Control art of switching converters by Keyue Ma Smedley; R D Middlebrook; Slobodan Ćuk; California

By Keyue Ma Smedley; R D Middlebrook; Slobodan Ćuk; California Institute of Technology. Division of Engineering and Applied Science

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The operational mechanisms are those of any minority carrier device and result in slower switching times than the majority carrier MOSFET. 15b. A less stable structure improvement involves using wider trenches, judiciously spaced, so that accumulate holes under the trench enhance emitter injection of electrons. This injection enhancement reduces the on-state voltage without degrading the switching performance. 17a, which incorporates an n+ buffer region. 17b. 15b. 2b, which allows a thinner wafer.

Assuming carrier velocity saturation (5x106 cm/s), calculate the drain ii. current and transconductance. Solution i. The MOSFET is biased in saturation since Vds > Vgs - VTH . 64 mho 50×10-9 1 ii. 14 shows the MOSFET equivalent circuit based on its structure and features. 14b is key to device operation and limitations. Capacitance exists within the structure from the gate to the source, Cgs, the gate to the drain, Cgd, and from the drain to the source, Cds. The capacitance Cgs. varies little with voltage; however Cds and Cgd vary significantly with voltage.

25a, an amplifying gate can be used to improve initial di/dt capability. 24. In each case the electric field ξ within the p1n2 junction reverse-bias scl is shown and because the n2 region is lightly doped, the scl extends deeply into it. The scl applied reverse-bias voltage is mathematically equal to the integral of the electric field, ξ (area under the curve). If, in the conventional SCR, the scl edge reaches the p2+ layer, then punch-through has occurred and the SCR turns on. To prevent such a condition and to allow for manufacturing tolerances, the n2- region is kept thick with the unfortunate consequence that on-state losses, which are proportional to n2 layer thickness, are high.

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